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docs: document SRJ export behavior and trace-width limitations - #1023
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tsci export -f srjis absent from the export reference, and the current build path can run autorouting before writing the file and lose the board's preferred trace width. This documents the command, the distinction between minimum and nominal widths, and the limitations users should check when sharing routing input.Motivation
Item 27 of Jan Mrázek's feedback email to Severin Ibarluzea, dated November 9, 2026, reports an approximately 90-second SRJ export on his board and connections receiving
minTraceWidthinstead ofdefaultTraceWidth. The report usedtsci 0.0.3127and@tscircuit/core 0.0.2311; the timing is reported feedback, not a benchmark performed for this PR. The email also describes agents leaving the tscircuit workflow to build custom tools. Documenting the supported export workflow and its limitations gives users and agents a clearer starting point for debugging within tscircuit.Changes
Why this comes before the implementation
The documentation establishes the expected behavior for follow-up PRs:
pcb_board.nominal_trace_widthto the canonical schema/type and verify unit-normalized parsing preserves it independently ofmin_trace_width.This PR changes documentation only; it describes the current limitations without claiming the runtime fixes are available.
Validation
bun run buildbun run typecheckbun run format:check --vcs-enabled=true --vcs-client-kind=git --vcs-use-ignore-file=true(excludes generated build files)git diff --check